Mail:4 Independence Way, Ste 200
Princeton, NJ 08540
Email: malay at
Malay K. Ganai
System Analysis and Verification
Malay K Ganai received B.Tech in Electrical Engineering from IIT Kanpur, India;
MS degree and Ph.D. degree in Electrical and Computer Engineering
from the University of Texas at Austin, USA. He is currently affiliated with
NECLA, and has involved in several research activities under Formal methods and their
application. His most current research interest is in Symbolic Testing of multi-threaded and distributed systems.
Paper 'SETSUDO: Perturbation-based testing Framework for Scalable Distributed system' is presented at TRIOS conference (affliated with SOSP'13).
Paper 'Efficient Data Race Prediction with Incremental Reasoning on Time-stamped Lock History' is presented at ASE'13 Conference.
Co-chairing (with Alper Sen) DIFTS 2013 held at Portland, OR on Oct 19, 2013, co-located with FMCAD and MEMOCODE. For further details, please click here.
Tutorial Chair for FMCAD 2013 held at Portland, OR between Oct 20-23, 2013. For further details, please click here.
In the Program chair committee of SMT workshop 2013 to be held at Helsinki, Finland on July 8-9, 2013. For submission guidelines, deadlines and other details, please click here.
Leading guest editor for a special issue in Journal of ECE on
Test Generation for Embedded Software and Systems. For submission guidelines, deadlines and other details, please click here.
I am lookout for summer interns for 2013. For further details, please click
I am co-chairing (with Nagesh Tamapalli) Functional Verification Track for VLSID2013 - 26th International Conference on VLSI Design, Pune, India, Jan 5-10, 2013. Please consider submitting papers.
I will be giving an invited talk at PAS 2012 - International Seminar on
Program Verification, Automated Debugging and Symbolic Computation in
Beijing, China, October 10-12, 2012. Please consider attending the seminar.
I am lookout for 2012 summer interns especially interested in
verification, testing, and runtime analysis of concurrent programs and distributed systems. If you are interested please follow the link.
Summer-intern 2012 blurb.
Summer internship positions are available for graduate students in the Systems Analysis and Verification Group at NEC Laboratories America, Princeton, New Jersey.
The SAV group engages in foundational as well as applied research in the areas of verification, testing and analysis of software and systems. The current projects include:
-Automatic unit test generation for C and C++ programs (uses F-Soft platform)
-Verification, testing, and runtime analysis of concurrent programs and distributed systems (uses CoBe and BEST platforms)
These projects offer a broad range of exciting topics for research - dynamic analysis, symbolic execution, concurrent program verification, automatic test generation, and testing of distributed systems and applications.
Students with systems programming expertise (Linux/Unix, Windows, Hadoop, HDFS) are especially welcome.
Students are encouraged to work closely with group members on new research problems, with potential for publication in premier conferences. Exact internship dates are flexible.
For past work and publications, please check the group website
For more information on NEC Labs, please check http://www.nec-labs.com.
If interested, please apply at http://www.nec-labs.com/careers/internship.php.
I am co-chairing DIFTS 2011 workshop (co-located with FMCAD 2011).